From: Jean-Philippe Bruyère <jp_bruyere@hotmail.com>
Date: Mon, 20 Dec 2021 08:39:19 +0000 (+0100)
Subject: rlh only if dot < 0
X-Git-Tag: v0.2.0~4
X-Git-Url: https://git.osiis.dedyn.io/?a=commitdiff_plain;h=58d87df0002fc54e9c3252f2b8d8531bf959654c;p=jp%2Fvkvg.git

rlh only if dot < 0
---

diff --git a/src/vkvg_context_internal.c b/src/vkvg_context_internal.c
index 65a5dec..ddc120e 100644
--- a/src/vkvg_context_internal.c
+++ b/src/vkvg_context_internal.c
@@ -795,7 +795,9 @@ bool _build_vb_step (vkvg_context* ctx, float hw, stroke_context_t* str, bool is
 	vec2 bisec_n_perp = vec2_perp(bisec_n);
 
 	//limit bisectrice length
-	float rlh = fminf (lh, fminf (length_v0, length_v1));
+	float rlh = lh;
+	if (dot<0.f)
+		rlh = fminf (rlh, fminf (length_v0, length_v1));
 	//---
 
 	vec2 bisec = vec2_mult_s (bisec_n_perp, rlh);
@@ -804,7 +806,7 @@ bool _build_vb_step (vkvg_context* ctx, float hw, stroke_context_t* str, bool is
 
 	vec2 rlh_inside_pos;
 
-	if (rlh < lh || ctx->lineJoin != VKVG_LINE_JOIN_MITER) {
+	if (!isCurve && (rlh < lh || ctx->lineJoin != VKVG_LINE_JOIN_MITER)) {
 		vec2 vnPerp;
 		if (length_v0 < length_v1)
 			vnPerp = vec2_perp (v1n);
@@ -819,7 +821,7 @@ bool _build_vb_step (vkvg_context* ctx, float hw, stroke_context_t* str, bool is
 	}
 
 	if (ctx->lineJoin == VKVG_LINE_JOIN_MITER || isCurve){
-		if (dot < 0.f && rlh < lh) {
+		if (!isCurve && dot < 0.f && rlh < lh) {
 			double x = (lh - rlh) * cosf (halfAlpha);
 			vec2 bisecPerp = vec2_mult_s (bisec_n, x);
 			vec2 p = vec2_add(p0, bisec);